Welcome to the Linux CXL documentation
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**Compute Express Link** (CXL) is a novel cache-coherent interconnect for CPUs, Memory Expansion and Accelerators built on top of the PCIe bus. It is guided by the `CXL Consortium <https://computeexpresslink.org/>`_, forming an open standard across the industry, thereby facilitating its development and adoption.

The contents in this site do not represent the CXL Consortium and are specific to Linux, both at the kernel level and the corresponding user-space components, to make the CXL work as a whole on the supported architectures. Of course, this can also provide value to developers of other operating systems. Furthermore this documentation is not meant to be a formal software manual, but more of a general resource to the open source community with insightful and updated information.

Before anything, please refer to the kernel's `Compute Express Link Memory Devices <https://www.kernel.org/doc/html/latest/driver-api/cxl/memory-devices.html>`_ document.

.. note::

   This project is under active development.

Contents
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.. toctree::
   :maxdepth: 1

   research
   resources